iso7221adr

Product Summary

The iso7221adr is a dual-channel digital isolator. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220 and in opposite directions in the ISO7221. This device has a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 ms, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

Parametrics

Absolute maximum ratings: (1)VCC Supply voltage, VCC1, VCC2: -0.5 to 6V; (2)VI Voltage at IN, OUT: -0.5 to 6V; (3)IO Output current: ±15mA; (4)Electrostatic kV ESD discharge, Human Body Model, Electrostatic ischarge JEDEC Standard 22, Test Method A114-C.01: ±4kV; (5)Electrostatic kV ESD discharge, Field-Induced-Charged Device Model, JEDEC Standard 22, Test Method C101: ±1kV; (6)Electrostatic kV ESD discharge, Machine Model, ANSI/ESDS5.2-1996: ±200V; (7)Maximum junction temperature, TJ: 170℃.

Features

Features: (1)1, 5, 25, and 150-Mbps Signaling Rate Options ; (2)Typical 25-Year Life at Rated Voltage; (3)4000-Vpeak Isolation, 560 V peak VIORM; (4)Operates with 3.3-V or 5-V Supplies; (5)4 kV ESD Protection; (6)High Electromagnetic Immunity; (7)-40℃ to 125℃ Operating Range.

Diagrams